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AU5780A SAE/J1850/VPW transceiver
Product data Supersedes data of 1999 Jan 28 2001 Jun 19
Philips Semiconductors
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
FEATURES
multiplexing
* Supports SAE/J1850 VPW standard for in-vehicle class B * Bus speed 10.4 kbps nominal * Drive capability 32 bus nodes * Low RFI due to output waveshaping with adjustable slew rate * Direct battery operation with protection against +50V load dump,
jump start and reverse battery
DESCRIPTION
The AU5780A is a line transceiver being primarily intended for in-vehicle multiplex applications. It provides interfacing between a link controller and the physical bus wire. The device supports the SAE/J1850 VPWM standard with a nominal bus speed of 10.4 kbps.
PIN CONFIGURATION
* Bus terminals proof against automotive transients up to
-200V/+200V
BATT 1 8 GND
* Thermal overload protection * Very low bus idle power consumption * Diagnostic loop-back mode * 4X mode (41.6 kbps) reception capability * ESD protected to 9 KV on bus and battery pins * 8-pin SOIC
TX
2 AU5780A
7
BUS_OUT
R/F
3
6
/LB
RX
4 SO8
5
BUS_IN
SL01207
QUICK REFERENCE DATA
SYMBOL VBATT.op TA VBATT.ld IBATT.lp VB VBOH -IBO.LIM VBI tbo tr, tf PARAMETER Operating supply voltage Operating ambient temperature Battery voltage Bus idle supply current Bus voltage Bus output voltage Bus output source current Bus input threshold Delay TX to BUS_OUT, normal battery BUS_OUT transition times, rise and fall, normal battery Measured at 3.875V Measured between 1.5 V and (VBATT - 2.75 V), 9 < VBATT < 16 V, tr tested at an additional bus load of RLOAD = 400 W and CLOAD = 22000 pF load dump; 1s VBATT=12V 0 < VBATT < 24V 300 < RL < 1.6k 0V < VBO < +6.0V -20 7.3 27 3.65 13 11 CONDITIONS MIN. 6 -40 TYP. 12 MAX. 24 +125 +50 220 +20 8.0 50 4.1 21 18 UNIT V C V A V V mA V s s
ORDERING INFORMATION
DESCRIPTION SO8: 8-pin plastic small outline package TEMPERATURE RANGE -40 to +125C ORDER CODE AU5780AD DWG # SOT96-1
2001 Jun 19
2
853-2261 26558
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
BLOCK DIAGRAM
BATTERY (+12V) BATT 1
LOW-POWER TIMER
VOLTAGE REFERENCE
TEMP. PROTECTION
BUS_OUT TX 2 TX- BUFFER OUTPUT BUFFER 7 Rb Rs R/F 3
/LB
6
INPUT BUFFER
Rf
Vcc
Rd 4 RX VOLTAGE REFERENCE INPUT FILTER 5 BUS_IN
AU5780 8 GND
SL01208
2001 Jun 19
3
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
PIN DESCRIPTION
SYMBOL BATT TX R/F RX BUS_IN /LB BUS_OUT GND PIN 1 2 3 4 5 6 7 8 Battery supply input (12V nom.) Transmit data input; low: transmitter passive; high: transmitter active Rise/fall slew rate set input Receive data output; low: active bus condition detected; float/high: passive bus condition detected Bus line receive input Loop-back test mode control input; low: loop-back mode; high: normal communication mode Bus line transmit output Ground DESCRIPTION
FUNCTIONAL DESCRIPTION
The AU5780A is an integrated line transceiver IC that interfaces an SAE/J1850 protocol controller IC to the vehicle's multiplexed bus line. It is primarily intended for automotive "Class B" multiplexing applications in passenger cars using VPW (Variable Pulse Width) modulated signals with a nominal bit rate of 10.4 kbps. The AU5780A also receives messages in the so-called 4X mode where data is transmitted with a typical bit rate of 41.6 kbps. The device provides transmit and receive capability as well as protection to a J1850 electronic module. A J1850 link controller feeds the transmit data stream to the transceiver's TX input. The AU5780A transceiver waveshapes the TX data input signal with controlled rise & fall slew rates and rounded shape. The bus output signal is transmitted with both voltage and current control. The BUS_IN input is connected to the physical bus line via an external resistor. The external resistor and an internal capacitance provides filtering against RF bus noise. The incoming signal is output at the RX pin being connected to the J1850 link controller. If the TX input is idle for a certain time, then the AU5780A enters a low-power mode. This mode is dedicated to help meet ignition-off current draw requirements. The BUS_IN input comparator is kept alive in the low-power mode. Normal power mode will be entered again upon detection of activity, i.e., rising edge at the TX input. The device is able to receive and transmit a valid J1850 message when initially in low-power mode. The AU5780A features special robustness at its BATT and BUS_OUT pins hence the device is well suited for applications in
the automotive environment. Specifically, the BATT input is protected against 50V load dump, jump start and reverse battery condition. The BUS_OUT output is protected against wiring fault conditions, e.g., short circuit to battery voltage as well as typical automotive transients (i.e., -200V / +200V). In addition, an overtemperature shutdown function with hysteresis is incorporated which protects the device under system fault conditions. The chip temperature is sensed at the bus drive transistor in the output buffer. In case of the chip temperature reaching the trip point, the AU5780A will latch-off the transceiver function. The device is reset on the first rising edge on the TX input after a small decrease of the chip temperature. The AU5780A also provides a loop-back mode for diagnostic purpose. If the /LB pin is open circuit or pulled low, then TX signal is internally looped back to the RX output independent of the signals on the bus. In this mode the electronic module is disconnected from the bus, i.e., the TX signal is not output to the physical bus line. In this mode, it can be used, e.g., for self-test purpose. The AU5780A is an enhanced successor of the AU5780. The AU5780A provides improved wave shaping when exiting the low power standby mode for reduced EMI. Several parameters that were formerly only characterized to the maximum normal operating supply of 16 volts, have now been characterized to 24 volt supplies. These parameters which are tested and guaranteed to 24 volts are identified with appropriate test conditions in the "conditions" columns of the Characteristics tables, otherwise the conditions at the top of the characteristic table applies to all parameters.
2001 Jun 19
4
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
CONTROL INPUT SUMMARY
TX 0 1 0 1 /LB 0 0 1 1 Loop-back Loop-back Communication Communication MODE BIT VALUE TX passive (default state) TX active Transmitter passive Transmitter active BUS_OUT float float float high RX (out) float (high) low bus state1 low
NOTE: 1. RX outputs the bus state. If the bus level is below the receiver threshold (i.e., all transmitters passive), then RX will be floating (i.e., high, considering external pull-up resistance). Otherwise, if the bus level is above the receiver threshold (i.e., at least one transmitter is active), then RX will be low.
ABSOLUTE MAXIMUM RATINGS
According to the IEC 134 Absolute Maximum System; operation is not guaranteed under these conditions; all voltages are referenced to pin 8 (GND); positive currents flow into the IC; unless otherwise specified. SYMBOL VBATT VBATT.ld VBATT.tr1 VBATT.tr2 VBATT.tr3 VB VB.tr1 VB.tr2 VB.tr3 VI ESDBATT ESDbus ESDlogic Ptot JA Tamb Tstg Tvj TLEAD ICL(BUS) ICL(BATT) supply voltage short-term supply voltage transient supply voltage transient supply voltage transient supply voltage Bus voltage transient bus voltage transient bus voltage transient bus voltage DC voltage on pins TX, R/F, RX, /LB ESD capability of BATT pin ESD capability of BUS_OUT and BUS_IN pins ESD capability of TX, RX, R/F, and /LB pins maximum power dissipation thermal impedance operating ambient temperature storage temperature junction temperature Lead temperature Bus output clamp current Battery clamp current Soldering, 10 seconds maximum No latch-up, |VBUS| = 25 V No latch-up or snap back, |VBATT| = 25 V -40 -40 -40 Air gap discharge, R=2k, C=150pF Air gap discharge, R=2k, C=150pF, Rf > 10 kW Human Body, R=1.5k, C=100pF at Tamb = +125 C load dump; t < 1s SAE J1113 pulse 1 SAE J1113 pulses 2 SAE J1113 pulses 3A, 3B Rf > 10 k ; Rb >10 SAE J1113 pulse 1 SAE J1113 pulses 2 SAE J1113 pulses 3A, 3B -200 -0.3 -9 -9 -2
1
PARAMETER
CONDITIONS
MIN. -20
MAX. +24 +50 V V V +150 V V V V +100 +200 7 +9 +9 +2 164 152 +125 +150 +150 265 100 100 V V V
UNIT
-100
-200 -20 -50
+200 +20
kV kV kV mW C/W C C C C mA mA
NOTE: 1. For bus voltages -20V < Vbus < -17V and +17V < Vbus < +20V the current is limited by the external resistors Rb and Rf.
2001 Jun 19
5
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
CHARACTERISTICS
-40C < Tamb < +125C; 6V < VBATT< 16V; V/LB> 3V; 0 < VBUS< +8.5V; RS= 56.2 kW Rd= 10 kW; Rf = 15 kW; Rb= 10W; 300 W< RL< 1.6 kW; all voltages are referenced to pin 8 (GND); positive currents flow into the IC; unless otherwise specified. SYMBOL IBATT.id IBATT.p IBATT.oc IBATT(SB) IBATT.sc Tsd Thys TDTYCY24 PARAMETER supply current; bus idle supply current; passive state supply current; no load supply current; bus output short to battery supply current; bus short to GND Thermal shutdown Thermal shutdown hysteresis Thermal shutdown, transmit duty cycle, at 24 V Bus load, RLOAD = 300 W, CLOAD = 16.55 nF, VBATT = 24 V, T = 128 ms Bus load, RLOAD = 300 W, CLOAD = 16.55 nF, VBATT = 20 V, T = 128 ms CONDITIONS TX low; Note 1 TX low TX high BUS to VBATT; no IBO current, VTX = high TX high, VBO = 0V 155 5 33 MIN. TYP. MAX. 220 1.5 8 10 60 170 15 UNIT A mA mA mA mA C C %
TDTYCY20
Thermal shutdown, transmit duty cycle, at 20 V
45
%
Pins TX and /LB Vih VILTX VilB Vh CTX Iih2 Iih6 Pin RX Vol Iih Irx Pin BUS_OUT Volb Vol Voh BUS_OUT in loop-back mode; TX high or low BUS_OUT voltage; passive BUS_OUT voltage; active /LB low or floating; 0VohLOWB
BUS_OUT voltage; low battery
VBATT - 1.7
8
V
- IBO.LIM - IBO.LIMn
BUS_OUT source current; bus positive BUS_OUT source current; bus negative
27 28
50 55
mA mA
2001 Jun 19
6
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
SYMBOL - IBO.LK.HO
PARAMETER BUS_OUT leakage current; TX high; bus low or operational BUS_OUT leakage current; TX high; bus positive
CONDITIONS -17 < VBUS < 8.5 V; TX = high; 0 V < VBATT < 24 V 8.5 V < VBUS < 17 V; TX = high; 0 V < VBATT < 24 V TX low; 0VMIN. -10
TYP.
MAX. IBO.LIM
UNIT A
- IBO.LK.HH
-10
10
A
- IBO.LK - IBO.N - IBO.LOG CBUSOUT Pin BUS_IN Vih Vil Vh IBIN IBIN(MAX)
BUS_OUT leakage current; TX low; bus positive BUS_OUT leakage current; TX low; bus negative BUS_OUT leakage current with loss of ground Bus output capacitance
-10 -10 -10
+10 +100 100 20
A A A pF
Input high voltage Input low voltage Input hysteresis Input bias current BUS_IN input current maximum with and without loss of ground Bus input capacitance Bus line to RX propagation delay, normal and 4X modes Measured at VBUSIN_HIGH or VBUSIN_LOW to RX; 6 < VBATT < 24 V; of RLOAD = 10 KW to 5 V -17V < Vbus < +17V -17 < VBUS < 17 V; 0 V < VBATT < 24 V; VTX high or low
4.1 3.65 100 -5 -100 +5 100
V V mV A A
CBUSIN, TDRXON, tDRXOFF
10 0.4
20 1.7
pF ms
2001 Jun 19
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Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
DYNAMIC CHARACTERISTICS
-40C < Tamb < +125C; 9V < VBATT< 16V; V/LB > 3V; 0V tr_hibatt, tf_hibatt
BUS_OUT transition times, rise and fall, high battery
11
18
s
tr_lobatt, tf_lobatt
BUS_OUT transition times, rise and fall, low battery
(VBATT - 4.25) / 0.43
(VBATT - 4.25) / 0.264
s
Isr
Bus output current slew rate
0.90
2.4
mA/s
VdB_limit
Bus emissions voltage output
-50
dBV
VdB_limit-1
Bus emissions voltage output, negative bus offset Bus noise rejection from battery Bus noise isolation from battery
-50
dBV
NR NI
dB dB
2001 Jun 19
8
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
SYMBOL Pin BUS_IN CBIN TDRXON; tDRXOFF
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Bus Input capacitance Bus line to RX propagation delay, normal and 4x modes Measured at VBUSIN_HIGH or VBUSIN_LOW to RX; 6 < VBATT < 24 V; of RLOAD = 10 kW to 5V tDRXOFF -tDRXON
10 0.4
20 1.7
pF s
TDRX_ Pin BATT tlow_power
Bus line to RX propagation delay mismatch, normal and 4x modes
-1.3
+1.3
s
time-out to low power state
TX low
1
4
ms
NOTES; 1. TX < 0.9V for more than 4 ms 2. For 6V < VBATT < 9V the bus output voltage is limited by the supply voltage. For 16V < VBATT < 24V (jump start) the load is limited by the package power dissipation ratings; the duration of this condition is recommended to be less than 90 seconds. 3. Tested with a bus load of RLOAD = 400 W and CLOAD = 22,000 pF.
2001 Jun 19
9
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
APPLICATION INFORMATION
SAEJ1850 LINK CONTROLLER
VPWO
VPWI Rd 10k 2) Rs, 56.2 kW, 1% +5V
10NF Cs
TX
RX
/LB
R/F BATT +12V
AU5780A TRANSCEIVER BUS_IN BUS_OUT
GND
15k Rf
10W RL
NOTE 1
CL
SAE/J1850 VPW BUS LINE
SL01209
NOTES: 1. Value depends, e.g., on type of bus node. Example: primary node RL=1.5kW , secondary node RL=10.7kW. 2. For connection of /LB there are different options, e.g., connect to VCC or to low-active reset or to a port pin. 3. The value of CL is suggested to be in the range 330 pF < CL < 470 pF.
2001 Jun 19
10
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
SO8: plastic small outline package; 8 leads; body width 3.9 mm
SOT96-1
2001 Jun 19
11
Philips Semiconductors
Product data
SAE/J1850/VPW transceiver
AU5780A
Data sheet status
Data sheet status [1] Objective data Preliminary data Product status [2] Development Qualification Definitions This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Product data
Production
[1] Please consult the most recently issued datasheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 2001 All rights reserved. Printed in U.S.A. Date of release: 06-01 Document order number: 9397 750 08501
Philips Semiconductors
2001 Jun 19 12

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